1. Field of the Invention
The present invention relates to a chopper type analog-to-digital (A/D) converter.
2. Description of Related Art
FIG. 5 is a circuit diagram showing a configuration of a comparator used by a conventional chopper type A/D converter. In this figure, the reference numeral 11 designates a capacitor, 12 designates an inverter circuit, and 13-15 each designate an analog switch. A first end (left-side end) of the capacitor 11 is connected to an analog input signal terminal (analog input terminal) 13a via the analog switch 13, and to a reference signal input terminal (reference input terminal) 14a via the analog switch 14. Thus, the capacitor 11 is alternately supplied with an analog input signal (analog input voltage VIN) and a reference signal (reference voltage VREF) at a timing described later. The inverter circuit 12 is connected in parallel with the analog switch 15, and an end of the inverter circuit 12 is connected to an output terminal 12a. The analog switches 13-15 undergo on-off control at a timing described later.
Next, the operation of the conventional chopper type A/D converter will be described with reference to FIGS. 6-8.
First, when the analog switches 13 and 15 are turned on and the analog switch 14 is turned off at a first timing point of a clock signal (see, FIG. 6), the first end of the capacitor 11 (point a) is supplied with the analog voltage VIN. As a result, the input side potential of the capacitor 11 (potential at the point a) rises to the level of the analog voltage VIN as illustrated in FIG. 7(a). On the other hand, since the analog switch 15 is placed at the ON state, the potential of a second end of the capacitor 11 (the potential at point b) is equal to the threshold voltage Vth of the inverter circuit 12 as illustrated in FIG. 7(b). Thus, the capacitor 13 is charged to the level corresponding to the difference between the VIN and Vth. In this case, the level of the output side (point C) of the inverter circuit 12 is placed at the threshold voltage Vth.
Subsequently, when the analog switches 13 and 15 are turned off and the analog switch 14 is turned on as illustrated in FIG. 8 at a second timing point of the clock signal, the first end of the capacitor 11 (point a) is supplied with the reference voltage VREF. As a result, the input side potential of the capacitor 11 (potential at the point a) is brought to the level of the reference voltage VREF as illustrated in FIG. 7(a). In the example as shown in FIG. 7, the reference voltage VREF is greater than the analog input voltage VIN. Accordingly, the potential at the second end (point b) of the capacitor 11 exceeds the threshold voltage Vth to the level Vth+xcex1 (xcex1=VREFxe2x88x92VIN) as illustrated in FIG. 7(b). As a result, the output side (point C) of the inverter circuit 12 is placed at the low level (FIG. 7(c)).
When the analog switches 13 and 15 are turned on and the analog switch 14 is turned off again at a third timing point of the clock signal, the first end of the capacitor 11 (point a) is supplied with the analog voltage VIN. As a result, the capacitor 11 is charged to the level corresponding to the VINxe2x88x92Vth.
Subsequently, when the analog switches 13 and 15 are turned off and the analog switch 14 is turned on at a fourth timing point of the clock signal, the first end of the capacitor 11 is supplied with the reference voltage VREF. When the reference voltage VREF is less than the analog input voltage VIN, the potential at the point b falls below the threshold voltage Vth to the level of Vthxe2x88x92xcex1, thereby placing the output side (point C) of the inverter circuit 12 at a high level.
As described above, the analog voltage VIN and the reference voltage VREF are alternately supplied to the capacitor 11 by the on-off control of the analog switches 13 and 14, so that the analog voltage VIN is compared with the reference voltage VREF by the on-off control of the analog switch 15, and the inverter output signal is produced from the output terminal 12a. 
However, the chopper type comparator as shown in FIG. 5 has a problem of imposing large power consumption on the A/D converter. This is because the potential changes of Vthxc2x1xcex1 at the second end (point b) of the capacitor 11 inevitably brings about the flow-through current (the current flowing through the two transistors of the CMOS inverter) of the inverter circuit 12 in the power-save mode.
To prevent the foregoing problem to save power, a chopper type comparator as shown in FIG. 9 is proposed. In FIG. 9, the same components as those of FIG. 5 are designated by the same reference numerals (although the analog switches 13 and 14 are omitted in FIG. 9). In FIG. 9, the second end (point b) of the capacitor 11 is grounded through a switch 16 to bring the input side of the inverter circuit 12 to the ground potential (L level) forcibly. Thus, the input side of the inverter circuit 12 is forcibly placed at the ground potential when the switch 16 is brought to the ON state while the analog switch 15 is at the OFF state, and neither the analog input voltage VIN or the reference voltage VREF is applied, thereby preventing the flow-through current of the inverter circuit 12. The prevention of the flow-through current can also be achieved by placing the input side of the inverter circuit at the power supply voltage (VDD) instead of placing the input side of the inverter circuit 12 at the ground potential.
The conventional chopper type comparator with the foregoing configuration comprises the switch 16 for forcibly bringing the input side of the inverter circuit 12 to the ground potential. It causes the charges stored in the capacitor 12 to flow through the switch 16, thereby changing the potential at the second end (point b) of the capacitor 11. In other words, the switch 16, operating as a capacitive component, changes the potential at the point b. As a result, applying the chopper type comparator as shown in FIG. 9 to the A/D converter presents a problem of degrading the accuracy of the A/D converter.
The present invention is implemented to solve the foregoing problems. It is therefore an object of the present invention to provide a chopper type A/D converter capable of reducing the power consumption and preventing degradation in the accuracy.
According to a first aspect of the present invention, there is provided a chopper type analog-to-digital converter having a comparator that includes an inverter circuit, a capacitor connected to an input terminal of the inverter, first switching means for supplying the capacitor with a reference voltage and an analog input voltage alternately, and second switching means for short-circuiting the input terminal of the inverter and an output terminal of the inverter, and that outputs an inverter output signal from the output terminal of the inverter in response to control of the first and second switching means, the chopper type analog-to-digital converter comprising: selecting means for supplying, when bringing the comparator into a power saving mode, the first switching means with one of a power supply voltage and a ground potential as the reference voltage, and with the other of the power supply voltage and the ground potential as the analog input voltage; and control means for halting control of the first and second switching means when the inverter output signal is placed at one of the ground potential and the power supply voltage.
Here, the first switching means may comprise a first switch connected to the capacitor, and a second switch connected to the capacitor; the selecting means may comprise a first selector for selectively supplying the first switch with one of the power supply voltage and the reference voltage, and a second selector for selectively supplying the second switch with one of the ground potential and the analog input voltage; and the control means may control, when bringing the comparator into the power saving mode, the first and the second selector such that they supply the first switch and the second switch with the power supply voltage and the ground potential, respectively.
The first switch and the second switch may be turned on and off alternately, and the second switching means may be turned on and off in response to the ON/OFF control of the first switch and the second switch.
The second switch may be turned off when the first switch and the second switching means are turned on, and the second switch may be turned on when the first switch and the second switching means are turned off.
The control means may supply the capacitor with one cycle of the ground potential and the power supply voltage each time a prescribed time has elapsed after starting the power saving mode by controlling the first switching means and the second switching means at predetermined timing.
The prescribed time may be determined in accordance with a leakage current of transistors constituting the inverter circuit and with an amount of charge the capacitor stores.
According to a second aspect of the present invention, there is provided a chopper type analog-to-digital converter having a plurality of comparators, each of which includes an inverter circuit, a capacitor connected to an input terminal of the inverter, first switching means for supplying the capacitor with a reference voltage and an analog input voltage alternately, and second switching means for short-circuiting the input terminal of the inverter and an output terminal of the inverter, and outputs an inverter output signal from the output terminal of the inverter in response to control of the first and second switching means, the chopper type analog-to-digital converter comprising: selecting means for supplying, when bringing each of the comparators into a power saving mode, the first switching means with one of a power supply voltage and a ground potential as the reference voltage, and with the other of the power supply voltage and the ground potential as the analog input voltage in each of the comparators; and control means for halting control of the first and second switching means of each of the comparators when the inverter output signal of each of the comparators is placed at one of the ground potential and the power supply voltage.